01 / The mechanism and its boundary
What is being described
The claim is that specified AI chips or facilities are not computing, or are powered off, throughout a declared period. Some agreement designs would use this to pause certain activities, or to hold a reserve of compute verified not to be in use. Verifying idleness would let a party show it is not using hardware it still owns. It is a negative claim, but a comparatively simple one: chips need power to compute, so a facility's power draw, knowledge of on-site generation and possibly thermal imaging could show whether hardware is running. One analysis expects this to be verifiable with less invasive methods than those needed to check what running chips compute. The difficulties are showing that the monitored facility holds the declared chips, covering every power source, and obtaining reliable power data that cannot be masked. On-chip telemetry and hardware licensing could add chip-level evidence or enforcement.
State of verification
Editorial synthesis from the AI Verification Tech Map.
Idleness is one of the more approachable negative claims, because computing needs power and leaves physical traces. On-chip telemetry and timed challenges are demonstrated (R2) as indicators of GPU activity, not as proofs that all declared hardware is idle.
Power draw, knowledge of on-site generation and possibly thermal imaging could show that a facility's chips are unpowered S-0005, but energy monitoring is unproven in practice and open to masking S-0062. On-chip telemetry (R2) and timed challenges (R2) could show whether a declared chip is busy, and GPU timing and memory measurements correlate with compute activity even when host and device are untrusted S-0033. Licensing and throttling (R1) would make chips refuse or slow work once a licensed budget is spent S-0057. Proofs of useful work (R1) instead keep declared hardware provably busy with agreed work S-1102.
A dark facility shows only that the hardware inside it is idle, so the claim depends on knowing where the declared chips are (Chips are where they are declared to be). Where chips must stay powered for permitted work, the claim becomes a bound on use (This compute runs inference, not training, A training run stayed within declared limits).
Connections in the research map
Concepts used
Techniques addressing this claim
Sources and provenance
- S-0005 / Tier B
Mechanisms to Verify International Agreements About AI Development ↗
A. Scher, L. Thiergart · 2025 · arXiv
Supports: chips without power cannot run a large training run; power draw, on-site generation and thermal imaging as less invasive verification
Locator: Verifying that known compute is not being used for a large training run
Version and catalogue details - S-0062 / Tier B
Verification methods for international AI agreements ↗
A. R. Wasil, T. Reed, J. W. Miller, P. Barnett · 2024 · arXiv
Supports: energy monitoring to detect facilities and approximate FLOPs; unproven, can be masked, data hard to obtain; evasions
Locator: Energy monitoring; Table 1; Figure 2
Version and catalogue details - S-0067 / Tier C
Verification Plan ↗
R. Dean · 2026 · AI 2040
Supports: compute bank verified not to be in use during an agreement
Locator: phase 3 (improving robustness)
Version and catalogue details - S-0002 / Tier B
Verifying International Agreements on AI: Six Layers of Verification for Rules on Large-Scale AI Development and Deployment ↗
M. Baker, G. Kulp, O. Marks, M. Brundage, L. Heim · 2025 · RAND Corporation
Supports: off-chip analog sensors; estimating utilisation and physical signature such as power as an R&D problem
Locator: §4; Table 2, Appendix A.6
Version and catalogue details - S-0057 / Tier B
Hardware-Enabled Governance Mechanisms: Developing Technical Solutions to Exempt Items Otherwise Classified Under Export Control Classification Numbers 3A090 and 4A090 ↗
G. Kulp, D. Gonzales, E. Smith, L. Heim, P. Puri, M. J. D. Vermeer, Z. Winkelman · 2024 · RAND Corporation
Supports: offline licensing tying chip features to a renewable licence with a compute budget
Locator: p. viii
Version and catalogue details - S-0037 / Tier B
Detecting Hidden ML Training With Zero-Overhead Telemetry ↗
R. Rahman, S. Tajdari · 2026 · ICML 2026 Workshop on Technical AI Governance Research
Supports: telemetry classifier accuracy overall and on adversarially disguised workloads
Locator: abstract; §5.2
Version and catalogue details - S-0033 / Tier B
Timing and Memory Telemetry on GPUs for AI Governance ↗
S. K. Monfared, F. Ganji, D. E. Holcomb, S. Tajik · 2026 · arXiv
Supports: timing and memory observables that correlate with GPU compute activity when host and device are untrusted
Locator: abstract
Version and catalogue details - S-1102 / Tier C
Pacing AI Requires Proof ↗
Attestable · 2026 · Attestable blog
Supports: approved work plus protocol-defined work fills a required work budget (provider proposal)
Locator: blog post
Version and catalogue details
- Source review date
- 2026-09-25
- Drafted by (source map)
- ai
- Review handles (source map)
- codex-review